Certain communication technologies such as xDSL have a high peak-to-average power ratio (PAR) which is the ratio of the peak signal power to the average power of the signal, where “x” specifies a particular variant of DSL (digital subscriber line). The term xDSL refers to DSL technologies such as ADSL (asymmetric DSL), HDSL (high bit rate DSL), IDSL (ISDN DSL), SDSL (symmetric DSL), VDSL (very high speed DSL), etc. These and other types of xDSL systems are generically referred to herein as “DSL” systems. A high PAR requirement places severe constraints on the line driver circuitry of DSL equipment. The line driver is typically used to amplify a signal and drive the amplified signal onto a line. Many types of conventional line driver circuits include class-A or class-AB amplifiers. However, class-A and -AB amplifiers are not well suited for high PAR applications such as DSL because theses classes of amplifiers remain fully powered even when not transmitting at peak power, thereby wasting significant energy.
Class-H amplifiers can be used in DSL equipment to reduce power consumption. A class-H amplifier can be constructed by adjusting the supply voltage of a conventional class-AB amplifier using a dynamic DC-DC converter in response to amplitude fluctuations in the signal to be transmitted. The power draw of a class-H amplifier is ideally reduced by the crest factor of the signal, where the crest factor is the square root of the PAR. Using a class-H amplifier as a line driver for high PAR applications potentially yields substantial power savings, especially for DSL technologies having a very high crest factor. In a practical realization, although the gain is reduced by necessary tolerance ranges in the voltage tracking, it is possible in principle to reduce the power consumption to 50% to 70% relative to a conventional class-AB amplifier.
In conventional systems, the output voltage of the DC-DC converter coupled to a class-H amplifier is typically set by means of a pulse width modulator (PWM). The duty cycle of the PWM determines the level of supply voltage applied to the class-H amplifier. The duty cycle of the PWM is a function of a mask input to the PWM. The profile of the mask depends on the envelope of the input signal of the amplifier. Since the output voltage of the DC-DC converter cannot follow the signal profile at every desired speed, the amplifier supply voltage, as early as before the occurrence of a signal peak, must be ramped up from a specific base level to the corresponding peak voltage in a controlled manner with a finite edge. Otherwise, the signal being amplified will be distorted. In addition, after the occurrence of the signal peak, the amplifier supply voltage should be ramped down back to the base level or some other suitable voltage level to save power. The profile of mask input to the PWM should thus correspond to changes in the signal being amplified so that the amplifier supply voltage can be properly ramped up and down to prevent clipping of the output signal while maximizing efficiency.
The DC-DC converter that generates the amplifier supply voltage has two operating modes: a continuous mode and a discontinuous mode. In the continuous mode, a current always flows through a coil inductor of the converter during the entire switching cycle, and the ratio of output voltage to input voltage of the DC-DC converter depends to a first approximation on only the duty ratio D of the PWM as given by:
                              V          out                =                              -                          V                              i                ⁢                                                                  ⁢                n                                              ·                      D                          1              -              D                                                          (        1        )            If the load current falls below a certain limit value, the coil current decreases to zero during certain portions of the switching cycle. In this so-called discontinuous mode, the output voltage is no longer dependent only on the duty ratio of the PWM, but it is also dependent on the inductance L of the coil, the PWM frequency 1/Ts and the load resistance R of the class-H stage as given by:
                                          V            out                    =                                    -                              V                                  i                  ⁢                                                                          ⁢                  n                                                      ·                          D                              K                                                    ⁢                                  ⁢                  where          ,                                    (        2        )                                K        =                              2            ·            L                                R            ·                          T              s                                                          (        3        )            
The mask input to the PWM can be described as a superposition of temporally offset and scaled ramp functions and can be generated in various ways. Upon each change from a flat level to a rising or falling edge, from a rising edge to a falling edge, or vice versa, a discontinuity point forms in the profile of the mask. Each discontinuity causes the DC-DC converter to affect a transient oscillation in accordance with its ramp response. Moreover, the DC-DC converter is ideally supplied with an uncontrolled input voltage in order to avoid an additional loss of efficiency as a result of a further DC-DC conversion. Ultimately, operation in the discontinuous mode is greatly dependent on the tolerance of the coil inductance L of the DC-DC converter. For these reasons, typically a closed-loop controller feeds back the output of the DC-DC converter to control the input of the PWM. The closed-loop controller compares the output voltage of the DC-DC converter with the value of the mask and correspondingly adapts the mask input to the PWM so that the output voltage of the converter follows the mask within acceptable tolerances.
Implementing a class-H amplifier by means of a closed-loop control system has several disadvantages. For example, the closed-loop control system requires feedback. Since the specific application involves the implementation of closed-loop control and PWM generation in the data pump portion of the line card, a further line is needed per channel for returning the output voltage or an equivalent measurement signal as a feedback signal. These extra feedback lines are in addition to the line required to communicate the PWM signal to the line driver. All of these additional lines significantly increase the routing outlay on the line card. Also, the closed-loop controller requires additional circuitry outlay in the data pump. For example, converting the amplifier voltage into a usable digital feedback signal requires additional A/D circuitry in the data pump or conversion into an additional PWM signal in the line driver. Also, a counter is typically needed in the data pump to evaluate the duty ratio. Each of these extra circuits requires additional outlay.
The closed-loop controller for a class-H amplifier also never exactly hits a predetermined target value. Particularly in the case of flat voltage levels, it should be expected that periodic control patterns will be established since the controller jitters about the target value. These control patterns are also superimposed on the supply voltage and forwarded to the signal output of the line driver in a manner attenuated by the power supply rejection ratio (PSRR). This causes disturbance frequencies in the signal being amplified which are difficult to predict and may lie in the useful band. In order to reduce these disturbance frequencies to a minimum, a comparatively high resolution of the PWM duty ratio is required. This necessitates a counter having a very high clock rate, making the implementation of the closed-loop controller even more difficult.